Diversity Methods for Improving Convergence and Accuracy of Quantum Error Correction Decoders Through Hardware Emulation

Francisco Garcia-Herrero; Javier Valls; Llanos Vergara-Picazo; Vicente Torres

doi:10.22331/q-2026-04-16-2071

Diversity Methods for Improving Convergence and Accuracy of Quantum Error Correction Decoders Through Hardware Emulation

Francisco Garcia-Herrero¹, Javier Valls², Llanos Vergara-Picazo¹, and Vicente Torres²

¹Department of Computer Architecture and Automatics, Complutense University of Madrid, Madrid, Spain
²Instituto de Telecomunicaciones y Aplicaciones Multimedia, Universitat Politecnica de Valencia, Valencia, Spain

Published:	2026-04-16, volume 10, page 2071
Editor:	Philipp Schindler
Eprint:	arXiv:2504.01164v2
Doi:	https://doi.org/10.22331/q-2026-04-16-2071
Citation:	Quantum 10, 2071 (2026).

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Abstract

As quantum computing moves toward fault-tolerant architectures, quantum error correction (QEC) decoder performance is increasingly critical for scalability. Understanding the impact of transitioning from floating-point software to finite-precision hardware is essential, as hardware decoder performance affects code distance, qubit requirements, and connectivity between quantum and classical control units. This paper introduces a hardware emulator to evaluate QEC decoders using real hardware instead of software models. The emulator can explore $10^{13}$ different error patterns in 20 days with a single FPGA device running at 150 MHz, guaranteeing the decoder's performance at logical rates of $10^{-12}$, the requirement for most quantum algorithms. In contrast, an optimized C++ software on an Intel Core i9 with 128 GB RAM would take over a year to achieve similar results. The emulator also enables the storage of uncorrectable error patterns that generate logical errors, allowing for offline analysis and the design of new decoders. Using results from the emulator, we propose a method that combines several belief propagation (BP) decoders with different quantization levels, which we define as a diversity-based decoder. Individually, these decoders may show subpar error correction, but together they outperform the floating-point version of BP for quantum low-density parity-check (QLDPC) codes like hypergraph or lifted product. Preliminary results with circuit-level noise and bivariate bicycle codes suggest that hardware insights can also improve software. Our diversity-based proposal achieves a similar logical error rate as the well-known approach, BP with ordered statistics (BP+OSD) decoding, with average speed improvements ranging from 30% to 80%, and 10% to 120% in worst-case scenarios, while reducing post-processing algorithm activation from 47% to 96.93%, maintaining the same accuracy.

► BibTeX data

@article{GarciaHerrero2026diversitymethods,
  doi = {10.22331/q-2026-04-16-2071},
  url = {https://doi.org/10.22331/q-2026-04-16-2071},
  title = {Diversity {M}ethods for {I}mproving {C}onvergence and {A}ccuracy of {Q}uantum {E}rror {C}orrection {D}ecoders {T}hrough {H}ardware {E}mulation},
  author = {Garcia-Herrero, Francisco and Valls, Javier and Vergara-Picazo, Llanos and Torres, Vicente},
  journal = {{Quantum}},
  issn = {2521-327X},
  publisher = {{Verein zur F{\"{o}}rderung des Open Access Publizierens in den Quantenwissenschaften}},
  volume = {10},
  pages = {2071},
  month = apr,
  year = {2026}
}

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Cited by

[1] Stergios Koutsioumpas, Tamas Noszko, Hasan Sayginel, Mark Webster, and Joschka Roffe, "Colour Codes Reach Surface Code Performance using Vibe Decoding", arXiv:2508.15743, (2025).

[2] Bane Vasic, Valentin Savin, Michele Pacenti, Shantom Borah, and Nithin Raveendran, "Quantum Low-Density Parity-Check Codes", arXiv:2510.14090, (2025).

[3] Daniel Báscones, Francisco Garcia-Herrero, and Javier Valls, "Exploring the FPGA and ASIC design space of belief propagation and ordered statistics decoders for quantum error correction codes", EPJ Quantum Technology 12 1, 140 (2025).

[4] Daniel Báscones, Arshpreet Singh Maan, Valentin Savin, and Francisco Garcia-Herrero, "A Scalable FPGA Architecture for Real-Time Decoding of Quantum LDPC Codes Using GARI", arXiv:2605.01035, (2026).

[5] Asit Kumar Pradhan, Nithin Raveendran, Narayanan Rengaswamy, and Bane Vasić, "Linear Time Iterative Decoders for Hypergraph-Product and Lifted-Product Codes", IEEE Transactions on Information Theory 72 7, 4618 (2026).

The above citations are from SAO/NASA ADS (last updated successfully 2026-08-08 19:03:50). The list may be incomplete as not all publishers provide suitable and complete citation data.

On Crossref's cited-by service no data on citing works was found (last attempt 2026-08-08 19:03:49).

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