Hierarchical memories: Simulating quantum LDPC codes with local gates

Christopher A. Pattison; Anirudh Krishna; John Preskill

doi:10.22331/q-2025-05-05-1728

Hierarchical memories: Simulating quantum LDPC codes with local gates

Christopher A. Pattison¹, Anirudh Krishna^2,3, and John Preskill^1,4

¹Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, CA 91125
²Department of Computer Science, Stanford University, Stanford, CA, 94305
³Stanford Institute for Theoretical Physics, Stanford University, Stanford, CA, 94305
⁴AWS Center for Quantum Computing, Pasadena CA 91125

Published:	2025-05-05, volume 9, page 1728
Editor:	Tom Gur
Eprint:	arXiv:2303.04798v2
Doi:	https://doi.org/10.22331/q-2025-05-05-1728
Citation:	Quantum 9, 1728 (2025).

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Abstract

Constant-rate low-density parity-check (LDPC) codes are promising candidates for constructing efficient fault-tolerant quantum memories. However, if physical gates are subject to geometric-locality constraints, it becomes challenging to realize these codes. In this paper, we construct a new family of $[[N,K,D]]$ codes, referred to as hierarchical codes, that encode a number of logical qubits $K = \Omega(N/\log(N)^2)$. The $N^{th}$ element of this code family is obtained by concatenating a constant-rate quantum LDPC code with a surface code; nearest-neighbor gates in two dimensions are sufficient to implement the corresponding syndrome-extraction circuit and achieve a threshold. Below threshold the logical failure rate vanishes superpolynomially as a function of the distance $D(N)$. We present a bilayer architecture for implementing the syndrome-extraction circuit, and estimate the logical failure rate for this architecture. Under conservative assumptions, we find that the hierarchical code outperforms the basic encoding where all logical qubits are encoded in the surface code.

Featured image: A small Hierarchical Code with a subset of the outer qLDPC code checks illustrated.

Popular summary

We propose a scheme called a Hierarchical Code for building a quantum memory that can efficiently preserve quantum information using only local gates in a two-dimensional layout. Building on quantum low-density parity check (qLDPC) codes, we construct a syndrome-extraction circuit whose depth grows with the number of logical qubits to be stored. By allowing the depth to increase, we circumvent the famous Bravyi-Poulin-Terhal bound on the efficiency of geometrically-local quantum memories. We prove that the Hierarchical Code has a threshold and, furthermore, asymptotically outperforms an ostensibly simpler proposal where logical qubits are all encoded in surface codes. We provide some evidence that this advantage manifests for reasonable physical error rates as well as note improved noise robustness to large-scale rare events. While our estimates use large codes, we expect that more detailed analyses in the future with state of the art qLDPC code constructions will significantly shrink the required system sizes. Finally, when available, the Hierarchical Code can take advantage of long-range gates of a given range $R$ to shorten the overall depth of the circuit — representing a tunable tradeoff between locality and circuit depth.

► BibTeX data

@article{Pattison2025hierarchical,
  doi = {10.22331/q-2025-05-05-1728},
  url = {https://doi.org/10.22331/q-2025-05-05-1728},
  title = {Hierarchical memories: {S}imulating quantum {LDPC} codes with local gates},
  author = {Pattison, Christopher A. and Krishna, Anirudh and Preskill, John},
  journal = {{Quantum}},
  issn = {2521-327X},
  publisher = {{Verein zur F{\"{o}}rderung des Open Access Publizierens in den Quantenwissenschaften}},
  volume = {9},
  pages = {1728},
  month = may,
  year = {2025}
}

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