Modeling Short-Range Microwave Networks to Scale Superconducting Quantum Computation

Nicholas LaRacuente; Kaitlin N. Smith; Poolad Imany; Kevin L. Silverman; Frederic T. Chong

doi:10.22331/q-2025-01-08-1581

Modeling Short-Range Microwave Networks to Scale Superconducting Quantum Computation

Nicholas LaRacuente¹, Kaitlin N. Smith², Poolad Imany³, Kevin L. Silverman⁴, and Frederic T. Chong⁵

¹Indiana University Bloomington, Bloomington, IN 47404, USA
²Northwestern University, Evanston, IL 60208, USA
³Icarus Quantum Inc., Boulder, CO 80302, USA
⁴National Institute of Standards and Technology, Boulder, CO 80305, USA
⁵University of Chicago, Chicago, IL 60642, USA

Published:	2025-01-08, volume 9, page 1581
Editor:	Krishna Kumar Sabapathy
Eprint:	arXiv:2201.08825v4
Doi:	https://doi.org/10.22331/q-2025-01-08-1581
Citation:	Quantum 9, 1581 (2025).

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Abstract

A core challenge for superconducting quantum computers is to scale up the number of qubits in each processor without increasing noise or cross-talk. Distributed quantum computing across small qubit arrays, known as chiplets, can address these challenges in a scalable manner. We propose a chiplet architecture over microwave links with potential to exceed monolithic performance on near-term hardware. Our methods of modeling and evaluating the chiplet architecture bridge the physical and network layers in these processors. We find evidence that distributing computation across chiplets may reduce the overall error rates associated with moving data across the device, despite higher error figures for transfers across links. Preliminary analyses suggest that latency is not substantially impacted, and that at least some applications and architectures may avoid bottlenecks around chiplet boundaries. In the long-term, short-range networks may underlie quantum computers just as local area networks underlie classical datacenters and supercomputers today.

Featured image: Diagram of possible circuit layouts considered.

Popular summary

For quantum computers to reach their full potential, a primary challenge is to scale up the number of qubits without also increasing noise and unwanted crosstalk. In this work, we explore and evaluate the possibility to split a superconducting quantum processor into smaller chiplets, connected by high-fidelity, low-latency microwave links. Both conventional multicore processors and high-performance distributed systems use analogous architectures. Our methods bridge from modeling the physical hardware to evaluating architectures at the more abstracted network layer. Results show a tradeoff between higher errors to transmit data over cross-chiplet links and lower on-chip errors from smaller chips. Chiplet architectures enable larger quantum computers to maintain low error rates per operation as they scale, paving the way for large-scale yet low-noise quantum processors.

► BibTeX data

@article{LaRacuente2025modelingshortrange,
  doi = {10.22331/q-2025-01-08-1581},
  url = {https://doi.org/10.22331/q-2025-01-08-1581},
  title = {Modeling {S}hort-{R}ange {M}icrowave {N}etworks to {S}cale {S}uperconducting {Q}uantum {C}omputation},
  author = {LaRacuente, Nicholas and Smith, Kaitlin N. and Imany, Poolad and Silverman, Kevin L. and Chong, Frederic T.},
  journal = {{Quantum}},
  issn = {2521-327X},
  publisher = {{Verein zur F{\"{o}}rderung des Open Access Publizierens in den Quantenwissenschaften}},
  volume = {9},
  pages = {1581},
  month = jan,
  year = {2025}
}

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