Sample-efficient verification of continuously-parameterized quantum gates for small quantum processors

Ryan Shaffer1,3, Hang Ren1,3, Emiliia Dyrenkova2,3, Christopher G. Yale4, Daniel S. Lobser4, Ashlyn D. Burch4, Matthew N. H. Chow4,5,6, Melissa C. Revelle4, Susan M. Clark4, and Hartmut Häffner1,3

1Department of Physics, University of California, Berkeley, CA 94720, USA
2Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720, USA
3Challenge Institute for Quantum Computation, University of California, Berkeley, CA 94720, USA
4Sandia National Laboratories, Albuquerque, NM 87123, USA
5Department of Physics and Astronomy, University of New Mexico, Albuquerque, NM 87131, USA
6Center for Quantum Information and Control, University of New Mexico, Albuquerque, NM 87131, USA

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Abstract

Most near-term quantum information processing devices will not be capable of implementing quantum error correction and the associated logical quantum gate set. Instead, quantum circuits will be implemented directly using the physical native gate set of the device. These native gates often have a parameterization (e.g., rotation angles) which provide the ability to perform a continuous range of operations. Verification of the correct operation of these gates across the allowable range of parameters is important for gaining confidence in the reliability of these devices. In this work, we demonstrate a procedure for sample-efficient verification of continuously-parameterized quantum gates for small quantum processors of up to approximately 10 qubits. This procedure involves generating random sequences of randomly-parameterized layers of gates chosen from the native gate set of the device, and then stochastically compiling an approximate inverse to this sequence such that executing the full sequence on the device should leave the system near its initial state. We show that fidelity estimates made via this technique have a lower variance than fidelity estimates made via cross-entropy benchmarking. This provides an experimentally-relevant advantage in sample efficiency when estimating the fidelity loss to some desired precision. We describe the experimental realization of this technique using continuously-parameterized quantum gate sets on a trapped-ion quantum processor from Sandia QSCOUT and a superconducting quantum processor from IBM Q, and we demonstrate the sample efficiency advantage of this technique both numerically and experimentally.

Quantum computers of the future will very likely use error correction to run long programs with high probability of success. But present-day quantum computers are far too unreliable to achieve this goal. Instead, today's quantum processors operate more like analog devices, with each operation requiring fine-tuning and frequent recalibration to minimize inaccuracy. The most common verification techniques for quantum computers assume that they implement a particular discrete set of operations. But to gain confidence in the correct behavior of near-term devices, an efficient verification technique is needed that tests over the full range of analog operations that the device implements, and not just a discrete set. In this work, we introduce a technique for this task called randomized analog verification (RAV), and we show that it has a significant efficiency advantage over existing techniques.

A well-known existing technique for this task is cross-entropy benchmarking (XEB), which works by running randomized programs on the quantum computer and comparing the observed output distribution with the ideal output distribution. In contrast, RAV works by designing randomized programs that have an ideal output distribution which is highly concentrated on a single outcome. This means that RAV requires observing only the output probability of this single outcome, rather than the full output distribution. We show that this leads to a significant efficiency advantage over XEB when estimating the imperfection of a device's operations. We also demonstrate this advantage experimentally on trapped-ion and superconducting quantum processors.

We believe that this efficiency improvement will help to speed up verification of calibration runs for near-term quantum computers, which should improve the availability and stability of these devices.

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[1] Colin Campbell, Frederic T. Chong, Denny Dahl, Paige Frederick, Palash Goiporia, Pranav Gokhale, Benjamin Hall, Salahedeen Issa, Eric Jones, Stephanie Lee, Andrew Litteken, Victory Omole, David Owusu-Antwi, Michael A. Perlin, Rich Rines, Kaitlin N. Smith, Noah Goss, Akel Hashim, Ravi Naik, Ed Younis, Daniel Lobser, Christopher G. Yale, Benchen Huang, and Ji Liu, 2023 IEEE International Conference on Quantum Computing and Engineering (QCE) 1020 (2023) ISBN:979-8-3503-4323-6.

[2] Jordan Hines, Marie Lu, Ravi K. Naik, Akel Hashim, Jean-Loup Ville, Brad Mitchell, John Mark Kriekebaum, David I. Santiago, Stefan Seritan, Erik Nielsen, Robin Blume-Kohout, Kevin Young, Irfan Siddiqi, Birgitta Whaley, and Timothy Proctor, "Demonstrating Scalable Randomized Benchmarking of Universal Gate Sets", Physical Review X 13 4, 041030 (2023).

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