Fermionic Averaged Circuit Eigenvalue Sampling
1Phasecraft Inc., Washington DC, USA
2Department of Computer Science, Virginia Tech, Alexandria, VA, USA
| Published: | 2026-04-08, volume 10, page 2053 |
| Editor: | Aaron Goldberg |
| Eprint: | arXiv:2504.01936v2 |
| Doi: | https://doi.org/10.22331/q-2026-04-08-2053 |
| Citation: | Quantum 10, 2053 (2026). |
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Abstract
Fermionic averaged circuit eigenvalue sampling (FACES) is a protocol to simultaneously learn the averaged error rates of many fermionic linear optical (FLO) gates simultaneously and self-consistently from a suitable collection of FLO circuits. It is highly flexible, allowing for the in situ characterization of FLO-averaged gate-dependent noise under natural assumptions on a family of continuously parameterized one- and two-qubit gates. We rigorously show that our protocol has an efficient sampling complexity, owing in-part to useful properties of the Kravchuk transformations that feature in our analysis. We support our conclusions with numerical results. As FLO circuits become universal with access to certain resource states, we expect our results to inform noise characterization and error mitigation techniques on universal quantum computing architectures which naturally admit a fermionic description.

Featured image: Given a set of noisy fermionic gates we wish to characterize, we model each by its associated noise channel followed by an application of the ideal gate (left). We compose the gates into a collection of circuits according to a design matrix, with accompanying twirled noise channels (right). By sampling from these circuits and fitting to a log-linear model, we learn many underlying noise parameters simultaneously.
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Cited by
[1] Lorenzo Grevink, Jonas Haferkamp, Markus Heinrich, Jonas Helsen, Marcel Hinsche, Thomas Schuster, and Zoltán Zimborás, "Will it glue? On short-depth designs beyond the unitary group", arXiv:2506.23925, (2025).
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